A block diagram of a digital delay line is shown in Fig. 11 below. The length of the delay is given by the exponent of .
Figure 11:
A digital delay line of length samples.
The input signal is given by
. For a delay line length of samples, the output is given by the relation
where
for .
The functioning of a delay line can be visualized as in Fig. 12, assuming and a discrete-time unit impulse input signal defined as
Figure 12:
Signal flow in a digital delay line of length samples.
For every time step , the signal value in the last (right-most) memory location is output from the delay line, the remaining stored values are propagated to adjacent memory locations (to the right), and a new input sample is written to the first (left-most) memory location.
Thus, the sample value of 1 that is input at time will appear at the delay line output at time step . For this particular example, all subsequent inputs and outputs to the delay line are zeroes. In this way, the finite length impulse response of the length digital delay line is given by
.