A block diagram of a digital delay line is shown in Fig. 7 below. The length of the delay is given by the exponent of (see the -Transform).
Figure 7:
A digital delay line of length samples.
The input signal is given by
. For a delay line length of samples, the output is given by the relation
where
for .
The transfer function for this system is given by .
The functioning of a delay line can be visualized as in Fig. 8, assuming and a discrete-time unit impulse input signal defined as
Figure 8:
Signal flow in a digital delay line of length samples.
For every time step , the signal value in the last (right-most) memory location is output from the delay line, the remaining stored values are propagated to adjacent memory locations (to the right), and a new input sample is written to the first (left-most) memory location.
Thus, the sample value of 1 that is input at time will appear at the delay line output at time step . For this particular example, all subsequent inputs and outputs to the delay line are zeroes. In this way, the finite length impulse response of the length digital delay line is given by
.
The phase response for the example delay line system is shown in Fig. 9, plotted both in radians (top) and as phase delay (negative phase divided by frequency) in samples (bottom), from which its linear phase response is clear.
Figure 9:
Phase response of a digital delay line of length samples: (top) phase in radians; (bottom) phase delay in samples.